Semiconductor device and method of manufacturing the same

ABSTRACT

A semiconductor device comprises an electrode formed above a substrate, an under bump metal (UBM) film on the electrode, the under bump metal film being in the shape of a recess, and a bump electrode embedded in the under bump metal film, the bump electrode having sides and bottom thereof surrounded by the under bump metal film.

CROSS REFERENCE TO RELATED APPLICATIONS

[0001] This application is based upon and claims the benefit of thepriorities from the prior Japanese Patent Applications No. 2001-259310filed on or around Aug. 29, 2001 and No. 2001-298252 filed on or aroundSep. 27, 2001, the entire contents of which are incorporated herein byreference.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] The invention relates to a semiconductor device and a method ofmanufacturing the same, and more particularly relates to a semiconductordevice including a bump electrode provided on an electrode via an underbump metal film, and a method of manufacturing such a semiconductordevice. Further, the invention relates to a semiconductor device inwhich substrates are joined, semiconductor substrates are joined, andthe substrate and the semiconductor substrate are joined, and a methodof manufacturing such a semiconductor device.

[0004] 2. Description of the Related Art

[0005] As semiconductor chips constituting semiconductor devices arebeing highly integrated and improved in their functions, a variety ofmethods have been developed and applied in order to connect externalconnection electrodes (i.e. bonding pads) of the semiconductor chips toelectrodes of a wiring substrate (i.e. a printed circuit board) on whichthe semiconductor chips are mounted. There have been strong demands forhighly integrated semiconductor chips such as IC (integrated circuit)chips and LSI (large scale integrated circuit) chips to be compatiblewith high speed circuit operation, efficient heat diffusion, andaccommodation of multiple terminals (pins). Recently, it is anticipatedthat high-end semiconductor chips are required to have several thousandsof external connection electrodes (terminals).

[0006] Further, semiconductor devices have been required to be compactin size and light in weight, and to perform multiple functions in theview of a system side. In order to satisfy the foregoing requirements,it is inevitable to mount semiconductor chips in an extensivelyintegrated state on the wiring substrate. A multiple chip structure or athree-dimensional mounting structure is being studied in order to meetrequirements for multiple functions.

[0007] The flip chip (FC) method or tape-automated bonding method (TAB)using bump electrodes is advantageous in order to increase terminals. Inthe FC method, bump electrodes are provided at least at either externalconnection electrodes of the semiconductor chip or electrodes of thewiring substrate, and the bump electrodes and electrodes are connected,or the bump electrodes are mutually connected. For instance, in asemiconductor chip having an extremely large number of high-endterminals, a plurality of solder bump electrodes are arranged in theshape of a lattice on a surface (circuit mounding surface) of thesemiconductor chip. The semiconductor chip is faced with a surface ofthe wiring substrate, and is mounted thereon. Thereafter, solder reflowis performed in order to join soldering bump electrodes and the wiringsubstrate, so that the semiconductor chip is mounted on the wiringsubstrate.

[0008] In the case of the TAB method, gold (Au) bump electrodes areprovided on external connection terminals of the semiconductor chip, andcopper (Cu)/tin (Sn) bump electrodes are formed on electrodes of thewiring substrate. Thereafter, the bump electrodes are positioned withrespect to leads of the wiring substrate, and the Au bump electrodes arejoined to the Sn/Cu bump electrodes by full thermo-compression. In thisstate, the semiconductor chips are completely mounted on the wiringsubstrate.

[0009] Minute bump electrodes are usually made by a plating process, asshown in FIG. 15(A) to FIG. 15(D) of the accompanying drawings.

[0010] (1) First of all, a semiconductor wafer 100 is prepared (see FIG.15(A)). The semiconductor wafer 100 is in a state prior to the dicinginto semiconductor chips. An external connection electrode (bonding pad)101 is provided on the semiconductor wafer 100 at a position where asemiconductor chip is to be formed. A passivation film 102 is present onthe external connection electrode 101, and has an aperture 102H. Apolyimide group resin film 103 extends over a bump electrode formingregion on the passivation film 102, and has an aperture 103H.

[0011] (2) An under bump metal (UBM) film 110 is formed all over thesemiconductor wafer 100, i.e. on the polyimide group resin film 103,passivation film 102, an inner wall of the aperture 103H, an inner wallof the aperture 102H, and the external connection electrode 101 which isexposed from the apertures 103H and 102H. The UBM film 110 is applied bythe sputtering, plating or the like, and is required to perform thefollowing.

[0012] (a) To keep the external connection electrode 101 and Au bumpelectrode 112 (see FIG. 15(B)) electrically conductive;

[0013] (b) To keep the external connection electrode 101 and bumpelectrode 112 in close contact with each other;

[0014] (c) To function as a barrier for preventing heat diffusionbetween the external connection electrode 101 and the bump electrode112, and preventing reduced conduction and adhesion depending upon time;and

[0015] (d) To function as a feeding layer during the plating.

[0016] In order to meet these requirements, the UBM film 110 includestwo or three stacked layers. For instance, the UBM film 110 isconstituted by a titanium (Ti) layer, a nickel (Ni) layer and apalladium (Pd) layer which are stacked one over after another, or achromium (Cr) layer, a Cu layer and an Au layer which are stacked oneover after another, when observed from the external connection electrode101 to the bump electrode. Further, the UBM film 110 is required to beseveral hundred nm to several μm thick.

[0017] (3) A photoresist film is applied onto the UBM film 110, and isexposed and developed by the photolithography process. A bump electrodeforming mask 111 is made using the photoresist film (refer to FIG.15(B)). The mask 111 has an aperture 111H via which the UMB film 110 hasits surface exposed on the external connection electrode 101.

[0018] (4) Electricity is supplied to the UBM film 110 by theelectrolytic plating, so that the Au bump electrode 112 is formed on theUBM film 110 in the aperture 111H of the bump electrode-forming mask111. Refer to FIG. 15(B).

[0019] (5) Thereafter, the bump electrode-forming mask 111 is strippedas shown in FIG. 15(C).

[0020] (6) The UBM film 110 is etched using the Au bump electrode 112 asan etching mask, and has its unnecessary part removed. For instance,when the UBM film 110 is constituted by the Ti, Ni and Pd layers, the Pdand Ni layers are wet-etched using a composite solution containingnitric acid, hydrochloric acid and acetic acid. Thereafter, the Ti layeris wet-etched using a fluoride acid solution.

[0021] A solder bump electrode made of lead (Pb)—Sn, silver (Ag)—Sn orthe like are manufactured as shown in FIG. 16(A) to FIG. 16(E).

[0022] (1) First of all, a semiconductor wafer 100 is prepared as shownin FIG. 16(A), similarly to the foregoing Au bump electrode 112. Anexternal connection electrode 101 is provided over a semiconductor chipforming regions of the semiconductor wafer 100. A passivation film 102having an aperture 102H, and a polyimide group resin film 103 having anaperture 103H are formed over the external connection electrode 101.

[0023] (2) Referring to FIG. 16(A), a UBM film 110 is formed on thesemiconductor wafer 100 and the external connection electrode 101. ThisUBM film 110 has the stacked structure similarly to the Au bumpelectrode 112. However, the UBM film 110 is thicker the UBM film 110 inthe foregoing case in order to prevent diffusion of Sn from a solderbump electrode 122 to the external connection electrode 101.

[0024] (3) Thereafter, a bump electrode-forming mask 121 is formed onthe UBM film 110 using the photolithography process (refer to FIG.16(B)). The bump electrode-forming mask 121 has an aperture 121H viawhich the front surface of the UBM film 110 is exposed on the externalconnection electrode 101.

[0025] (4) Electricity is supplied to the UBM film 110 by theelectrolytic plating process. Referring to FIG. 16(B), the solder bumpelectrode 122 is formed in an aperture 121H of the bumpelectrode-forming mask 121 and on the UBM film 110.

[0026] (5) The bump electrode-forming mask 121 is stripped as shown inFIG. 16(C).

[0027] (6) Referring to FIG. 16(D), the UBM film 110 is wet-etched usingthe solder bump electrode 122 as an etching mask, and has itsunnecessary part removed.

[0028] (7) Solder reflowing is performed in order to form a sphericalsolder bump electrode 122B, as shown in FIG. 16(E).

[0029] The semiconductor devices including the Au bump electrode 112 andthe solder bump electrode 122 seem to have the following problems.

[0030] (1) When making the Au bump electrode 112, the UBM film 110 iswet-etched in order to remove its unnecessary part. Since thewet-etching process is generally isotropic, undercuts 110U are causedjust under the Au bump electrode 112, as shown by dotted lines in FIG.17. For instance, when the semiconductor wafer 100 has an 8-inchdiameter, each undercut 110U may be approximately 10 μm wide. It isassumed here that the Au bump electrode 112 has a diameter which isequal to or less than 20 μm. In such a case, the UBM film 110 islessened by the undercuts 110U, so that no junction can be formedbetween the external connection electrode 101 and the Au bump electrode112. This problem also occurs when manufacturing the solder bumpelectrode 122.

[0031] (2) It is very difficult to make a minute Au bump electrode 112or solder bump electrode 122. Therefore, it is also very difficult for asemiconductor device to accelerate circuit operation, promote heatdiffusion, increase the number of terminals, be compact in size andlight in weight, and perform multiple functions.

[0032] (3) Either the Au bump electrode 112 or the solder bump electrode122 may be joined with reduced mechanical strength because of theundercuts 110U of the UBM film 110. As a result, the joined portion maybe cracked and broken due to stress resulting from a temperature cycle,which will lead to reduced reliability of the semiconductor device.

[0033] (4) It is conceivable to adopt a dry etching process or theanisotropic etching such as the reactive ion etching (RIE) process inorder to remove the unnecessary part of the UBM film 110. However, theUBM film 110 includes materials which are difficult to dry-etch. If thedry etching process is forcibly applied, the UBM fill 110 has to beetched for a long period of time and at an increased cost.

[0034] On the other hand, it is very difficult to join electrodes, whichare spaced with a reduced pitch therebetween, using the foregoing solderbump electrodes 122. Specifically, the solder bump electrodes 122 aremelted once by the solder reflowing and then hardened in order to jointhe electrodes. It is difficult to control the shape of joined solderbump electrodes 122. Further, solder bump electrodes 122 tend to expandat sides where they are in contact with adjacent electrodes.

[0035] In order to overcome this problem, there is a recent trend tojoin electrodes in a semiconductor device without using solder bumpelectrodes. Referring to FIG. 18, an external connection electrode 201of a semiconductor chip 200 is joined to an external connectionelectrode 211 of a semiconductor chip 210 without using a solder bumpelectrode. In other words, the external connection electrodes 201 and211 are compressed and are joined. Prior to compression, the parallelism(an inclination from the x-y plane) of the semiconductor chips 200 and210 is adjusted in order that the external connection electrodes 201 and211 are aligned and have equal deviation of a rotation angle θ in thedirections x and y and around the axis z.

[0036] Further, when the external connection electrodes 201 and 211 aremade of metal such as Cu that easily generates compounds such as oxideor sulfide and so on, it is technically important to reliably join theexternal connection electrodes 201 and 211 without generating suchcompounds or to join them via their fresh surfaces after removing suchcompounds.

[0037] In a first method of overcoming the foregoing problem, electrodesmay be joined in a hydrogen-reduced atmosphere. In this case, it isnecessary to use a joining unit which can adjust the hydrogen-reducedatmosphere to a predetermined pressure and the parallelism of thesemiconductor chips 200 and 210, align the external connectionelectrodes 201 and 211 in the unit of μm, control pressure to beapplied, and promote heat for reduction reaction. Heating up to 450° C.is necessary for the reduction reaction.

[0038] The foregoing joining unit is very bulky and expensive, whichmeans that semiconductor devices manufactured thereby will become alsoexpensive.

[0039] There is a second method of overcoming the foregoing problem. Inthis method, the external connection electrodes 201 and 211 areirradiated by ions at the substantially room temperature and inextremely high vacuum in order to remove oxide or organic substances.Thereafter, the external connection electrodes 201 and 211 are joined.In the second method, it is also necessary to use a joining unit whichcan completely remove air from a space around the external connectionelectrodes 201 and 211, radiate ions onto them, adjust the parallelismof the semiconductor chips 200 and 210, align the external connectionelectrodes 201 and 211 in the unit of μm, control pressure to beapplied. Heating up to 450° C. is necessary for the reduction reaction.

BRIEF SUMMARY OF THE INVENTION

[0040] According to a first aspect of the invention, there is provided asemiconductor device comprising: a first electrode formed above a firstsubstrate; an under bump metal film on the first electrode, the underbump metal film being in the shape of a recess; and a bump electrodeembedded in the under bump metal film, the bump electrode having sidesand bottom thereof surrounded by the under bump metal film.

[0041] The invention provides, as a second aspect, a method ofmanufacturing a semiconductor device, comprising: forming an electrode;forming an insulating film on the electrode, the insulating film havingan aperture; forming an under bump metal film on the insulating film, aninner wall of the aperture and the electrode in the aperture; forming abump electrode film on the under bump metal film, and embedding the bumpelectrode film in the aperture; removing the bump electrode film and theunder bump metal film from portions except for the aperture to form abump electrode; and taking off at least a part of a surface of theinsulating film.

[0042] According to a third aspect of the invention, there is provided amethod of manufacturing a semiconductor device, comprising: forming afirst substrate having a first electrode; forming a second substratehaving a second electrode; applying a non-activated solvent onto asurface of at least one of the first and second electrodes; bringing thesecond electrode into contact with the first electrode via thenon-activated solvent, and compressing the first and second electrodes;and activating the solvent at a temperature which is lower than amelting point temperatures of the first and second electrodes, beforethe first and second electrodes are joined.

[0043] In accordance with a fourth aspect of the invention, there isprovided a method of manufacturing a semiconductor device, comprising:forming a first substrate having a first electrode; forming a secondsubstrate having a second electrode; applying a non-activated solventonto a surface of at least one of the first and second electrodes, thenon-activated solvent being heat-cured and being activated at atemperature which is lower than a thermosetting temperature; bringingthe second electrode into contact with the first electrode via thenon-activated solvent, and compressing the first and second electrodes;activating the solvent at a temperature which is lower than a meltingpoint temperatures of the first and second electrodes, before the firstand second electrodes are joined; and heat-curing the solvent after thefirst and second electrodes are joined.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

[0044]FIG. 1 is an enlarged cross section of a part of a semiconductordevice in a first embodiment of the invention, showing the basicstructure of a semiconductor chip and bump electrodes.

[0045]FIG. 2(A) to FIG. 2(E) are cross sections of the bump electrode,showing how the semiconductor device is manufactured in the firstembodiment.

[0046]FIG. 3 is an enlarged schematic cross section of the semiconductordevice having a first structure in the first embodiment.

[0047]FIG. 4 is an enlarged cross section of a part of the semiconductordevice of FIG. 3.

[0048]FIG. 5(A) to FIG. 5(E) are cross sections showing how aninterposer is made in the semiconductor device of FIG. 3 and FIG. 4.

[0049]FIG. 6 is a schematic cross section of the semiconductor devicehaving a second structure in the first embodiment.

[0050]FIG. 7 is an enlarged cross section of a part of the semiconductordevice of FIG. 6.

[0051]FIG. 8(A) to FIG. 8(D) are cross sections showing how a bumpelectrode is made in the semiconductor device in a second embodiment ofthe invention.

[0052]FIG. 9(A) to FIG. 9(E) are cross sections showing how a bumpelectrode is made in the semiconductor device in a third embodiment ofthe invention.

[0053]FIG. 10 shows a configuration of a semiconductor devicemanufacturing system in a fourth embodiment of the invention.

[0054]FIG. 11 is a flowchart showing processes of the semiconductordevice of the fourth embodiment.

[0055]FIG. 12 shows a configuration of a semiconductor device in thefourth embodiment of the invention.

[0056]FIG. 13 shows the configuration of a semiconductor device in afifth embodiment of the invention.

[0057]FIG. 14 is a flowchart showing a procedure of the semiconductordevice of the fifth embodiment.

[0058]FIG. 15(A) to FIG. 15(D) are cross sections showing how an Au bumpelectrode is made in a semiconductor device of the related art.

[0059]FIG. 16(A) to FIG. 16(E) are cross sections showing how a solderbump electrode is made in a semiconductor device of the related art.

[0060]FIG. 17 is an enlarged cross section of a part of thesemiconductor device of the related art.

[0061]FIG. 18 is a cross section showing how semiconductor devices arejoined in the related art.

DETAILED DESCRIPTION OF THE INVENTION

[0062] The following describe semiconductor devices and methods ofmanufacturing the semiconductor devices with reference to embodimentsshown in the drawings. Like or corresponding parts are denoted by likeor corresponding reference numbers. It should be noted that the drawingsare schematic and that dimensional relationships between componentsshown therein sometimes differ from those of actual products.

FIRST EMBODIMENT OF THE INVENTION

[0063] [Basic Structures of Semiconductor Chip and Bump Electrode]

[0064] In a first embodiment, a semiconductor device has a basicstructure as shown in FIG. 1, and comprises at least an externalconnection electrode 18, a UBM film 20 provided on the externalconnection electrode 18 and extending in the shape of a recess, and abump electrode 21 having sides and bottom thereof surrounded by the UBMfilm 20.

[0065] Specifically, a semiconductor chip 1 comprises: a semiconductorsubstrate 10 constituted by a silicon single crystal substrate; anelement 12 provided on a main surface (a circuit mounting surface) ofthe semiconductor substrate 10; a first wiring 14 on the element 12; asecond wiring 16 on the first wiring 14; and the external connectionelectrode 18 also functioning as a third wiring on the second wiring 16.Each external connection electrode 18 serves as a external connectionelectrode for a semiconductor chip 1. In this embodiment, thesemiconductor chip 1 has a three-layer wiring structure as describedabove. Alternatively, it may have any number of layers.

[0066] The element 12 is an insulated gate field effect transistor(IGFET) in this embodiment. IGFET includes at least a metal insulatorsemiconductor field effect transistor (MISFET), and a metal oxidesemiconductor field effect transistor (MOSFET). Specifically, theelement 12 includes a channel forming region constituted by thesemiconductor substrate 10 (or a well region), an insulating gate film12A on the channel forming region, a gate electrode 12B on theinsulating gate film 12A, and a pair of semiconductor regions 12Cpositioned at opposite sides of the gate electrode 12B and functioningas a source or drain region. The element 12 is surrounded by an elementisolating and insulating film 11. Alternatively, the element 12 may havea different element structure.

[0067] The first wiring 14 is provided on an inter-level isolation layer13 extending over the element 12, and is electrically connected to thesemiconductor region 12C via a connection hole (e.g. a through hole or avia hole) of the inter-level isolation layer 13. The first wiring 14,second wiring 16 (to be described later) and external connectionelectrode 18 are Cu wires or Cu alloy wires prepared by the damasceneprocess. The first wiring 14 may be constituted by an aluminum (Al)film, an aluminum alloy film (e.g. an Al—Cu film, Al—Si film or Al—Cu—Sifilm), or the like. The inter-level isolation layers 13, 15 and 17 maybe made of a single of layer of a silicon oxide film or a siliconnitride film, or a plurality of layers of foregoing films.

[0068] The second wiring 16 is placed on the inter-level isolation layer17, and is electrically connected to the first wiring 14 via aconnection hole of the inter-level isolation layer 17.

[0069] The external connection electrode (i.e. the third wiring) 18 isplaced on the inter-level isolation layer 17, and is electricallyconnected to the second wiring 14 via a connection hole of theinter-level isolation layer 17.

[0070] The UBM film 20 has its bottom electrically and mechanicallycontacted with the surface of the external connection electrode 18. TheUBM film 20 has sides which stand substantially upright on the externalconnection electrode 18, and are substantially as high as a bumpelectrode 21 received therein.

[0071] In this embodiment, the bump electrode 21 is a Cu bump electrode.The UBM film 20 is constituted by a tantalum nitride (TaN) film, atantalum (Ta) film and a Cu film, all of which are stacked one overafter another, when observed from the front surface of the externalconnection electrode 18. The uppermost Cu film is at least electricallyconductive, and is efficiently in contact with the external connectionelectrode 18. The Ta film is at least electrically conductive, andfunctions as a barrier for preventing diffusion between the externalconnection electrode 18 and the bump electrode 21. The lowermost TaNfilm is at least electrically conductive, and functions as ananti-oxidant film. The UBM film 20 serves as a feeding layer when thebump electrode 21 is made by the electrolytic plating.

[0072] The bump electrode 21 is substantially surrounded by the UBM film20, i.e. has its cross sectional shape defined by the UBM film 20.Although not shown, the outline of the bump electrode 21 may becircular, oval, rectangular, or polygonal such as hexagonal, octagonaland so on. It is preferable for the bump electrode 21 to have a circularor substantially circular outline in order to be mechanically resistantto a temperature cycle. Further, in the case of an application specificIC (ASIC) or the like, the bump electrode 21 is preferably polygonal inorder to reduce an amount of electronic information if the outline ofthe bump electrode 21 is treated as electronic information. An open partdefined by the UBM film 20 is generally identical to the outline of thebump electrode 21. Even when the electronic information on the outlineof the bump electrode 21 (or a reticle pattern for forming a bumpaperture 25H of an insulating film 25) has been set to a polygon, theoutline of an actual bump electrode 21 becomes approximately circulardue to adjacent effect in an exposure process, the wraparound of etchingsolution in the etching process or like while a semiconductor wafer isbeing produced. In this embodiment, the bump electrode 21 may beconstituted by a Cu film prepared by the electrolytic plating process.

[0073] Generally speaking, the bump electrode 21 is substantially flatat its top, but has a chamfered peripheral edge 21C. As a result, thetop of the bump electrode 21 is further flattened. A bump electrode film21A and UMB film 20 (shown in FIG. 2(B)) at unnecessary parts of thebump electrode 21 can be removed by chemical mechanical polishing (CMP)as will be described later with respect to a semiconductor devicemanufacturing method. The bump electrode 21 is softer than theinsulating film 25, so that the upper center of the bump electrode 21becomes slightly concave, which may cause the peripheral edge of thebump electrode 21 to be sharpened as shown by dotted lines (see FIG. 1).Therefore, the sharpened edge of the bump electrode 21 is chamfered asdescribed above, if necessary.

[0074] At least a part of the external connection electrode 18 incontact with the bump electrode 21, i.e. at least a part of the UBM film20 in contact with the external connection electrode 18, is covered bythe insulating film 25 serving as a passivation film. In short, a partof the bump electrode 21 in contact with the external connectionelectrode 18 is fitted in the bump aperture 25H of the insulating film25 via the UBM film 20.

[0075] The insulating film 25 may be a non-organic insulating films suchas a silicon oxide film, a silicon nitride film or the like which isprepared by the plasma CVD (chemical vapor deposition) process.Alternatively, the insulating film 25 may be an organic insulating filmsuch as a silicon oxide film prepared by the spin-on-glass process(SOG), a polyimide group resin film prepared by the spin coatingprocess, or the like.

[0076] In the semiconductor device of this embodiment, the UBM film 20surrounds the sides and bottom of the bump electrode 21, and enables theformation of a sufficient sectional area for introducing electricity anddiffusing heat between the external connection electrode 18 and the bumpelectrode 21. This is effective in promoting micro-fabrication of thebump electrode 21, and increasing the number of terminals. Further, TheUBM film 20 protects the side surfaces of the bump electrode 21 againstcorrosion, which improves the reliability of the semiconductor device.The bump electrode 21 has its top adapted to be joined to anotherelectrodes (such as an interposer plug 34 shown in FIG. 3 and FIG. 4),and is protected against corrosion. This is because the top of the bumpelectrode 21 is not exposed.

[0077] The UBM film 20 is mechanically strong to protect the bumpelectrode 21 against deformation and enables the bump electrode 21 tohave uniform height. This is effective in promoting reliable connectionsbetween the bump electrode 21 and other electrodes thereon.

[0078] The insulating film 25 mechanically reinforces the connectionbetween the external connection terminal 18 and the UBM film 20 and theconnection between the UBM film 20 and the bump electrode 21. Therefore,it is possible to prevent the foregoing connections from being crackedor broken by shearing force caused by the thermal cycle, and to improvethe electrical reliability of the connections. When it is a non-organicinsulating film such as a silicon oxide film or a silicon nitride film,the insulating film 25 can reliably protect the foregoing connectionsagainst the shearing force. Alternatively, the insulating film 25 madeof an organic insulating film such as a polyimide group resin film canabsorb the shearing force.

[0079] The bump electrode 21 has the chamfered upper edge 21C, andbecomes flattened at the top thereof, which is effective in improvingthe electrical reliability of the connections between the bump electrode21 and other electrodes.

[0080] [Methods of Manufacturing Bump Electrode and SemiconductorDevice]

[0081] The semiconductor device including the foregoing bump electrode21 is manufactured by a method which is shown in FIG. 2(A) to FIG. 2(E).It is assumed here that the method is applied to produce a minute Cubump electrode having a 5 μm diameter and 0.5 μm height.

[0082] (1) First of all, referring to FIG. 2(A), a semiconductor wafer10W is prepared, and is in the state prior to a dicing process to obtaina semiconductor chip. The semiconductor wafer 10W is a silicon singlecrystal wafer, and includes an external connection electrode 18 mountedon a circuit mounting surface where semiconductor chip is to be formed.

[0083] (2) As shown in FIG. 2(A), the insulating film 25A having thebump aperture 25H is formed on the external connection electrode 18. Forinstance, the insulating film 25A is a non-organic insulating film suchas a silicon oxide film, a silicon nitride film or the like prepared bythe plasma CVD process, and is 1.5 μm thick. In order to make the bumpaperture 25H, a photo-resist film is formed on the insulating film 25A,and is exposed and developed by the photolithography process in order toobtain an etching mask. Then, the insulating film 25A is patterned bythe anisotropic etching such as RIE and using the etching mask. Theanisotrophic etching is preferable in view of scale down. Alternatively,the insulating film 25A may be an organic insulating film as describedabove.

[0084] (3) The UBM film 20 is applied onto the semiconductor wafer 10W,i.e. onto the insulating film 25A, inner wall of the bump aperture 25H,and the external connection terminal 18 in the bump aperture 25H (referto FIG. 2(B)). For example, the UBM film 20 is constituted by anapproximately 80 nm-200 nm thick Cu film, an approximately 5 nm-50 nmthick Ta film, and an approximately 5 nm-50 nm thick TaN film. All ofthese films are prepared by a continuous spattering process. The UBMfilm 20 is substantially uniformly thick on the inner surface of thebump aperture 25H and on the external connection electrode 18.

[0085] (4) The bump electrode film 21A is applied onto the UBM film 20in order to cover the bump aperture 25H, as shown in FIG. 2(B). The bumpelectrode film 21A is a Cu film prepared by the electrolytic platingprocess using the UBM film 20 as a feeding film. The Cu film isapproximately 1.0 μm to 3.0 μm thick, for example.

[0086] (5) Referring to FIG. 2(C), unnecessary parts of the bumpelectrode film 21A and UBM film 20 are removed by the CMP. The bumpelectrode 21 is defined by the side of the bump aperture 25H and the UBMfilm 20 on the external connection electrode 18 at the bottom of thebump aperture 25H. In the CMP process, the semiconductor wafer 10W ischemically and mechanically polished, so that it can be uniformlyflattened. In other words, the insulating film 25A, the UBM film 20 inthe bump aperture 25H and the bump electrode 21 are substantially flushwith one another.

[0087] (6) The insulating film 25A has its surface partially removed bythe dry or wet etching process, so that the UBM film 20 and the bumpelectrode 21 project therefrom. Refer to FIG. 2(D). Specifically, theinsulating film 25A is removed by an amount of approximately 0.5 μm, andis finally 1.0 μm thick. Further, if it is an organic group resin film,the insulating film 25A may be partially removed using a plasma asher.

[0088] If the external connection terminal 18 and the UBM film 20 are insufficiently close contact with each other, the insulating film 25A maybe completely removed.

[0089] (7) The bump electrode 21 is slightly concave at its top centerand has a sharpened edge, which is chamfered by the CMP process as shownby the reference numeral 21C, so that the upper surface of the bumpelectrode 21 is flattened.

[0090] (8) After the foregoing processes, the semiconductor wafer 10W iselectrically and mechanically connected to the external connectionterminal 18 via the UBM film 20 and includes the bump electrode 21standing 0.5 μm from the insulating film 25A.

[0091] (9) Thereafter, the semiconductor wafer 10W is subject to thedicing process, so that the semiconductor chips 1 as shown in FIG. 1will be produced.

[0092] (10) The semiconductor chip 1 will be mounted on a multiple layerwiring substrate 5 (shown in FIG. 3), and a semiconductor device 2(shown in FIG. 3) will be completed.

[0093] In the first embodiment, the insulating film 25A with the bumpaperture 25H is prepared first. The UBM film 20 is applied over the bumpaperture 25H and the external connection electrode 18. The UBM film 20is not patterned by the wet etching process using the bump electrode 21as a mask, which prevents side etching of the UBM film 20. Therefore,the external connection electrode 18 and the bump electrode 21 can bereliably conductive therebetween via the UBM film 20, which improvesmanufacturing throughput of the semiconductor device. Further, theminute bump electrode 21 having a diameter of 5 μm, for instance, can bemanufactured without difficulty.

[0094] The upper surface of the insulating film 25A is flattened by theCMP, which enables the bump electrode 21 to have uniform height and tobe free from poor connections. Further, the unnecessary parts of thebump electrode film 21A and UBM film 20 on the insulating film 25A areremoved by the CMP process one after another, which is effective inreducing the number of manufacturing steps.

[0095] Further, the sharpened upper edge of the bump electrode 21 ischamfered, which is effective in flattening the upper surface of thebump electrode 21, reducing poor connections between the bump electrode21 and other electrodes arranged thereon, and improving manufacturingthroughput of the semiconductor device.

[0096] [First Structure of Semiconductor Device]

[0097] The semiconductor device 2 has a first structure as shown in FIG.3 and FIG. 4, and comprises at least a multiple wiring substrate 5, aninterposer 3 arranged on the multiple wiring substrate 5, and thesemiconductor chip 1 on the interposer 3.

[0098] Although not shown in detail, the multiple wiring substrate 5includes a substrate body 51, and is provided with a plurality ofelectrodes (internal electrodes) 52 on the substrate body 51 (on theupper surface thereof shown in FIG. 3). The substrate body 51 may be aceramics substrate, a silicon carbide substrate, an epoxy group resinsubstrate or the like.

[0099] The interposer 3 functions as an intermediate wiring substrateprovided between the multiple wiring substrate 5 and the semiconductorchip 1, and has at least an interposer body 30, plug holes 30H extendingthrough the interposer body 30, insulating films 31 covering innersurfaces of the plug holes 30H, barrier metal films 32 extending overthe insulating films 31, plating seed films 33 on the barrier metalfilms 32, plugs 34 fitted in the plug holes 30H and being in contactwith the plating seed films 33, first wirings 35 on the surface of theinterposer body 30, second wirings 36 on the first wirings 35, andexternal connection electrodes (third wirings) 37 on the second wirings36. Further, UBM films 40 and bump electrodes 41 are provided on theexternal connection electrodes 37, both of which are identical to theUBM films 20 and bump electrodes 21 of the foregoing semiconductor chip1.

[0100] The interposer body 30 may be a single silicon substrate whichhas a thermal expansion coefficient equal to that of the semiconductorsubstrate 10 of the semiconductor chip 1 and can be manufactured by theprocedure for the semiconductor chip 1. The plugs 34 may be Cu plugshaving excellent electric conductivity. The Cu plugs are made by theelectrolytic process on the inner surfaces of the plug holes 30H usingthe plating seed films 33, are fitted in the plug holes 30H, andfunction as wirings extending through the interposer 3.

[0101] On the front surface of the interposer 3, each plug 34 has itsone end electrically connected to each first wiring 35. On the rearsurface of the interposer 3, the other end of each plug 34 iselectrically connected to the external connection electrode 18 of thesemiconductor ship 1 via the bump electrode 21 and the UBM film 20. Inthe semiconductor device 2, the semiconductor chip 1 is mounted on themultiple wiring substrate 5 with an integrated circuit mounting surfaceof the semiconductor chip 1 facing the interposer 3 and the multiplewiring substrate 5, i.e. the FC mounting method is employed.

[0102] The first and second wirings 35 and 36, and external connectionelectrodes 37 are constituted by Cu films or Cu alloy films. Needles tosay, Al films or Al alloy films are also usable. Insulating films areprovided between the first and second wirings 35 and 36, and between thesecond wirings 36 and the external connection electrodes 37, andconnection holes are made between the forgoing members. The insulatingfilms and connection holes are structured similarly to those of thesemiconductor chip 1, and will not be described here.

[0103] UBM films 40 and bump electrodes 41 on the external connectionelectrode 37 are identical to the UBM film 20 and bump electrode 21 intheir configuration and material. Each UBM film 40 is in the shape of arecess, and houses each bump electrode 41 therein, and surround thesurface and bottom of the bump electrode 41.

[0104] A part of the bump electrode 41 in contact with the externalconnection terminal 37 is embedded in a bump aperture 42H of aninsulating film 42 via the UBM film 40.

[0105] The bump electrode 41 of the interposer 3 is electrically andmechanically connected to an electrode 52 of the multi-layer wiringsubstrate 5 via a solder bump electrode 6. The solder bump electrode 6may be made of a two-component alloy such as Sn—Pb, Sn—Ag, Sn—Zn orSn—Cu, a three-component alloy such as Sn—Ag—Cu, or a four-componentalloy or more component alloy, for example.

[0106] [Method of Manufacturing Interposer]

[0107] The interposer 3 will be manufactured as shown in FIG. 5(A) toFIG. 5(E).

[0108] (1) First of all, a semiconductor wafer 3W is prepared as aninterposer body 30 as shown in FIG. 5(A). The semiconductor wafer 3W maybe a silicon single crystal wafer which is several hundred μm thick.

[0109] (2) Referring to FIG. 5(B), a plug hole 30H is formed in thesemiconductor wafer 3W from the top thereof by anisotropic etching suchas RIE. The plug hole 30H has a diameter of 30 μm, and is 60 μm deep.Alternatively, the plug hole 30H has different dimensions.

[0110] (3) An insulating film 31, a barrier metal film 32 and a platingseed film 33 are formed one over after another on the semiconductorwafer 3W and on an inner surface and bottom of the plug hole 30H. Referto FIG. 5(C).

[0111] (4) As shown in FIG. 5(D), a plug forming film 34A is formed onthe plating seed film 33 in order to cover the plug hole 30H. The plugforming film 34A is a Cu film which is obtained by electrolytic platingand using the plating seed film 33 as a feeding film.

[0112] (5) Referring to FIG. 5(E), at least the plug forming film 34A,plating seed film 33 and barrier metal film 32 are removed, by the CMP,at portions except for the plug hole 30H, so that a plug 34 is preparedin the plug hole 30H.

[0113] (6) Thereafter, the first and second wirings 35 and 36, andexternal connection terminal 37 (a third wiring) and so on are preparedby the damascene process. Refer to FIG. 4.

[0114] (7) The UBM film 40 and bump electrode 41 are formed on theexternal connection electrode 37 on the semiconductor wafer 3W,similarly to the UBM film 20 and bump electrode 21 of the semiconductorchip 1. Refer to FIG. 3 and FIG. 4.

[0115] (8) The semiconductor wafer 3W is thinned by grinding and the CMPat the rear surface thereof in order that the plug 34 is exposed fromthe rear surface. In this state, the semiconductor wafer 3W isapproximately 60 μm thick.

[0116] (9) The semiconductor wafer 3W is then diced, thereby obtainingthe interposer 3 as shown in FIG. 3 and FIG. 4.

[0117] Second Structure of Semiconductor Device

[0118] A semiconductor device 2 has a three-dimensional structure asshown in FIG. 6 and FIG. 7, and comprises at least a multiple wiringsubstrate 5, semiconductor chips 7A, 7B and 7C stacked on the multiplewiring substrate 5 one over after another, and a semiconductor chip 1described previously.

[0119] The multiple wiring substrate 5 and semiconductor chip 1 arefundamentally identical to those described with respect to the firststructure, and will not be described her.

[0120] The semiconductor chips 7A, 7B and 7C are identical one another,and are configured similarly to the interposer 3 shown in FIG. 3 andFIG. 4. Specifically, each of the semiconductor chips 7A, 7B and 7Ccomprises at least: a semiconductor substrate 70 made of a siliconsingle crystal substrate; a plug hole 70H extending through thesemiconductor substrate 70 (refer to FIG. 7); an insulating film 71extending over an inner surface of the plug hole 70H; a barrier metalfilm 72 on the insulating film 71; a plating seed film 73 on the barriermetal film 72; a plug 74 fitted in the plug hole 70H and being incontact with the plating seed film 73; a first wiring 75 on thesemiconductor substrate 70; a second wiring 76 on the first wiring 75;and an external connection electrode 77 (a third wiring) on the secondwiring 76.

[0121] Although not shown, each of the semiconductor chips 7A, 7B and 7Cincludes an element on the surface thereof. The element is used toconstitute an integrated circuit similarly to the element 12 of theforegoing semiconductor chip 1. Further, each of the semiconductor chips7A, 7B and 7C includes a UBM film 80 and a bump electrode 81 on anexternal connection electrode 77. The UBM film 80 and bump electrode 81are identical to the UBM film 20 and bump electrode 21 of thesemiconductor chip 1.

[0122] The external connection electrodes 77, bump electrodes 81 ofsemiconductor chips 7A, 7B and 7C, the external connection electrode 18and the bump electrode 21 of the semiconductor chip 1 are arranged inthe shape of a lattice all over the semiconductor substrates 70 and 10.Alternatively, it is possible to arrange the external connectionterminals 77 and bump electrodes 81 only on peripheral areas of thesemiconductor substrates 70 and 10.

[0123] The plug 74 may be a Cu plug having excellent conductivity,similarly to the plug 34 of the interposer 3, and is prepared on theinner wall of the plug hole 70H using the plating seed film 73. The plug74 is fitted in the plug hole 70H and extends through the semiconductorsubstrate 70.

[0124] The first and second wirings 75 and 76 and external connectionelectrode 77 are made of a Cu film or a Cu alloy film. Alternatively,these wirings may be made of an Al film or an Al arroy film. Insulatingfilms or connection holes are provided between the first and secondwirings 75 and 76, and between the second wiring 76 and the externalconnection electrode 77. The insulating films and connection holes areconfigured similarly to those of the semiconductor chip 1, and will notbe described here.

[0125] The UBM film 80 on the external connection electrode 77 is in theshape of a recess, and the bump electrode 81 is fitted in the UBM film80 with its outer surface and bottom surrounded thereby. The UBM film 80and bump electrode 81 are identical to the UBM film 20 and bumpelectrode 21 of the semiconductor chip 1.

[0126] A part of the bump electrode 81 in contact with the externalconnection electrode 77 is fitted in a bump aperture 82H of aninsulating film 82 via the UBM film 80.

[0127] The lowermost semiconductor chip 7A is mounted via its frontsurface on a front surface of the multiple wiring substrate 5 (refer toFIG. 6 and FIG. 7), i.e. the FC mounting method is employed. Theexternal connection electrode 77 of the semiconductor chip 7A iselectrically and mechanically connected to an electrode 52 of themultiple wiring substrate 5 via the bump electrode 81.

[0128] The second semiconductor chip 7B is mounted via its front surfaceon a rear surface of the semiconductor chip 7A (refer to FIG. 6 and FIG.7), i.e. the FC mounting method is employed. The external connectionelectrode 77 of the semiconductor chip 7B is electrically andmechanically connected to a plug 74 of the semiconductor chip 7A via thebump electrode 81.

[0129] The third semiconductor chip 7C is mounted via its front surfaceon a rear surface of the semiconductor chip 7B (refer to FIG. 6 and FIG.7), i.e. the FC mounting method is employed. The external connectionelectrode 77 of the semiconductor chip 7C is electrically andmechanically connected to a plug 74 of the semiconductor chip 7B via thebump electrode 81.

[0130] The uppermost semiconductor chip 1 is mounted via its frontsurface on a rear surface of the semiconductor chip 7C (refer to FIG. 6and FIG. 7), i.e. the FC mounting method is employed. The externalconnection electrode 18 of the semiconductor chip 1 is electrically andmechanically connected to the plug 74 of the semiconductor chip 7C viathe bump electrode 21.

[0131] The semiconductor device 2 is not only as advantageous as thesemiconductor chip 1 but also has the following features. Thesemiconductor chips 7A to 7C are vertically stacked one over afteranother on the multiple wiring substrate 5, which is effective in makingthe semiconductor device 2 further compact. The semiconductor chip 7A iselectrically and mechanically connected via the plug 74 thereof to thesemiconductor chip 7B. Further, the semiconductor chip 7B iselectrically and mechanically connected via the plug 74 thereof to thesemiconductor chip 1. Therefore, it is possible to reduce connectionroutes between the upper and lower semiconductor chips, and toaccelerate circuit operation.

SECOND EMBODIMENT OF THE INVENTION

[0132] A second embodiment of the invention relates to an improvement ofthe foregoing semiconductor device manufacturing method in order tocontrol the thickness of the insulating film 25 of the semiconductorchip 1 more effectively. A semiconductor device 2 will be manufacturedby the following processes, shown in FIG. 8(A) to FIG. 8(D).

[0133] (1) First of all, a semiconductor wafer 10W is prepared as in thefirst embodiment. See FIG. 8(A).

[0134] (2) Referring to FIG. 8(A), an insulating film 25A is formed onan external connection electrode 18 on the semiconductor wafer 10W, andhas a bump aperture 25H. The insulating film 25A includes at least firstand second insulating films 251 and 252. The second insulating film 252is present on the first insulating film 251 and has an etching ratiodifferent from that of the first insulating film 251. The firstinsulating film 252 may be a non-organic film such as a silicon oxidefilm or a silicon nitride film prepared by the plasma CVD process, andis 1.0 μm thick. The second insulating film 252 may be an organic filmsuch as a polyimide group resin prepared by the spin coating process,and is 5 μm thick. The bump aperture 25H is made by the photolithographyor etching process, similarly to the manufacturing method in the firstembodiment.

[0135] (3) A UBM film 20 is applied on the insulating film 25, an innerwall of the bump aperture 25H, and the external connection electrode 18,i.e. full face on the semiconductor wafer 10W. Refer to FIG. 8(B).

[0136] (4) A bump electrode film 21A is applied onto the UBM film 20 inorder to cover at least the bump aperture 25H, as shown in FIG. 8(B).

[0137] (5) Referring to FIG. 8(C), the bump electrode film 21A and UBMfilm 20 are removed by the CMP from positions except for the bumpaperture 25H. A bump electrode 21 is formed in the bump aperture 25H,and is surrounded by the UBM film 20 on the inner wall of the bumpaperture 25H and the external connection electrode 18.

[0138] (6) A part of the insulating film 25A, i.e. the second insulatingfilm 252, is selectively dry-etched or wet-etched, so that the UBM film20 and the bump electrode 21 stick out. The first insulating film 251 isat a lower level than the UBM film 20 and bump electrode 21, and servesas an insulating film 25. When the second insulating film 252 is anorganic resin film, it can be easily removed using a plasma asher. Referto FIG. 8(D).

[0139] (7) The bump electrode 21 is chamfered and processed as describedwith the process shown in FIG. 2(E) related to the first embodiment. Thesemiconductor wafer 10W includes the bump electrode 21 electrically andmechanically connected to the external connection electrode 18 via theUBM film 20 and partially surrounded by the insulating film 25.

[0140] (8) The semiconductor wafer 10W is diced, thereby obtaining thesemiconductor chip 1 as shown in FIG. 1. The semiconductor chip 1 ismounted on a multiple wiring substrate 5 as shown in FIG. 4, FIG. 6 andFIG. 7, so that the semiconductor device 2 is completed.

[0141] In the second embodiment, the insulating film 25A is constitutedby the first and second insulating films 251 and 252 which have thedifferent etching ratios. The second insulating film 252 is selectivelyetched, so that a part of the insulating film 25A is uniformly removedon the semiconductor wafer 10W.

THIRD EMBODIMENT OF THE INVENTION

[0142] A third embodiment relates to a method which is essentiallyidentical to the manufacturing method in the first embodiment, butdiffers therefrom in materials of UBM film 20 and bump electrode 21 ofthe semiconductor chip 1. In this embodiment, a minute Sn bump electrodewhich is 10 μm thick and 1 μm high will be made as shown in FIG. 9(A) toFIG. 9(E).

[0143] (1) A semiconductor wafer 10W is prepared as shown in FIG. 9(A).

[0144] (2) An insulating film 25A is applied onto the semiconductorwafer 10W, and has a bump aperture 25H on an external connectionelectrode 18. Refer to FIG. 9(A).

[0145] (3) A UBM film 26 is applied on the insulating film 25A, an innerwall of the bump aperture 25H, and the external connection electrode 18,i.e. full face on the semiconductor wafer 10W. Refer to FIG. 9(B). TheUBM film 26 is constituted by an approximately 50 nm to 100 nm thicktitanium (Ti) film, and an approximately 150 nm to 300 nm thick Ni film,which are prepared by continuous sputtering. The UBM film 26 hassubstantially uniform thickness on the inner wall of the bump aperture25H and the external connection electrode 18.

[0146] (4) A bump electrode film 27 a is applied on the UBM film 26 inorder to cover at least the bump aperture 25H. The bump electrode film27A is an Sn film prepared by the electrolytic plating and using the UBMfilm 26 as a feeding film. The Sn film is approximately 2 μm to 5 μmthick. Refer to FIG. 9(B).

[0147] (5) Referring to FIG. 9(C), the bump electrode film 27A and UBMfilm 26 are removed by the CMP process from positions except for thebump aperture 25H. A bump electrode 27B is formed in the bump aperture25H, and is surrounded by the UBM film 26 on the inner wall of the bumpaperture 25H and the external connection electrode 18.

[0148] (6) A part of the insulating film 25A is selectively dry-etchedor wet etched, so that the UBM film 26 and the bump electrode 27B stickout. The insulating film 25A is at a lower level than the UBM film 26and bump electrode 27, and serves as an insulating film 25. Theinsulating film 25A is removed by an amount of approximately 5 μm, andthe insulating film 25 is finally 1.5 μm thick, for example. Refer toFIG. 8(D).

[0149] (7) As shown in FIG. 19(E), solder reflowing is performed for thebump electrode 27B at approximately 200° C. to 280° C., therebyobtaining a bump electrode 27 having a somewhat rounded edge.

[0150] (8) The semiconductor wafer 10W will be completed after theforegoing processes, and includes the bump electrode 27 electrically andmechanically connected via the UBM film 26.

[0151] (9) The semiconductor wafer 10W is diced, thereby obtaining thesemiconductor chip 1 as shown in FIG. 1.

[0152] (10) The semiconductor chip 1 is mounted on a multiple wiringsubstrate 5 as shown in FIG. 3, FIG. 4, FIG. 6 and FIG. 7, so that thesemiconductor device 2 is completed.

[0153] The manufacturing method of the third embodiment is asadvantageous as the manufacturing method of the first embodiment. Thebump electrode 27B has its side and bottom surrounded by the UBM film26, i.e. the UBM film 26 keeps the bump electrode 27B in good shape(serves as a dam). Therefore, even when solder reflowing is performedfor the bump electrode 27B, the UBM film 26 prevents flow out of thematerial (Sn) of the bump electrode 27B. This is effective in keepingthe bump electrode 27 in good shape.

[0154] In the semiconductor device 2 obtained by the method of the thirdembodiment, adjacent bump electrodes 27 are protected againstshort-circuiting which might be caused by the material flowing from thebump electrode 27B during the solder reflowing. Further, it is possibleto improve electrical reliability of the bump electrodes 27, and arrangethe bump electrodes 27 with fine pitches, and increase the number ofterminals.

[0155] The UBM film 26 in the shape of a recess has suitable mechanicalstrength. The bump electrodes 27 are very slow to be deformed and canhave uniform height, which is effective in improving electricalreliability with other electrodes such as plug 34 of the interposer(shown in FIG. 6 and FIG. 7), or an electrode 52 of the multiple wiringsubstrate 5 on the bump electrodes 27, and plugs 74 of the semiconductorchips 7A to 7C, shown in FIG. 6 and FIG. 7.

FOURTH EMBODIMENT OF THE INVENTION

[0156] Fourth embodiment relates to how to join first and secondelectrodes on first and second substrates in a semiconductor device.

[0157] The first substrate may be a semiconductor substrate, and thesecond substrate may be a semiconductor substrate, a wiring substrate orthe like. The first and second electrodes are joint electrodes (bondingelectrodes). At least one of the first and second electrodes ispreferably shaped to stick out of a surface of the substrate.

[0158] For example, the first or second electrode may be a bumpelectrode, or a land. In the latter case, the first or second electrodeis shaped to stick out of the surface of the substrate in order tofacilitate joint. The land is constituted by a conductive pattern whichsticks out compared with a peripheral area, so that it is not necessaryto shape the land in order to stick out so long as electrodes are incontact with one another and can be joined.

[0159] Further, it is assumed that a through plug which is provided in asemiconductor substrate (e.g. a semiconductor chip) or an anothersemiconductor substrate is used as the first or second electrode. Insuch a case, the through plug can stick out of the semiconductorsubstrate by selectively removing the surface of the semiconductorsubstrate.

[0160] The first or second electrode preferably contains at least one ofCu, Ni, Au and Ag, or a plurality of alloys. The foregoing metal isusually used as a material for joint electrodes. Especially, Cu, Ni andAg tend to generate oxide compounds while Au attracts organicsubstances. These materials are preferable to the electrodes.

[0161] The method of the fourth embodiment includes sticking a solventat least to either the first or second electrode. In this case, thesolvent preferably contains at least non-organic acid or organic acid inorder to efficiently remove oxides or the like.

[0162] The solvent is activated by resistance heating or irradiatinginfrared beams, electron beams or laser beams, depending upon thestructure of the semiconductor device and a method of supplyingactivation energies.

[0163] [Structure and Operation of Semiconductor Manufacturing System]

[0164] A semiconductor manufacturing system (e.g. a flip chip bonder)300 is usable in order to manufacture the semiconductor device of thefourth embodiment. Refer to FIG. 10.

[0165] The semiconductor manufacturing system 300 includes a stage 301,a head 309, and charge coupled device (CCD) cameras 305 and 306. On thestage 301 is placed a semiconductor chip 303, which constitutes asemiconductor device, is joined as a first substrate, and is a highspeed DRAM (dynamic random access memory) chip. The head 309 holds asemiconductor chip 307, which constitutes the semiconductor device, isjoined as a second substrate, and is a logic chip. Although not shown indetail, the semiconductor chips 303 and 307 are mainly made ofsemiconductor substrates 10, similarly to the semiconductor chip 1 shownin FIG. 1.

[0166] The stage 301 is provided with an adsorbing section of a vacuumadsorbing system 320, and detachably adsorbs and holds the semiconductorchip 303. Further, the head 309 has another adsorbing section of thevacuum adsorbing system 320, and detachably adsorbs and holds thesemiconductor chip 307.

[0167] A conveyer robot 321 delivers and receives the semiconductor chip303 to and from the stage 301. Further, a conveyer robot 322 deliversand receives the semiconductor chip 37 to and from the head 309.

[0168] At least the stage 301 or the head 302 is connected to a positionadjusting mechanism 323, to which the CCD cameras 305 and 306 areconnected. The position adjusting mechanism 323 adjusts the positions ofthe semiconductor chips 303 and 307 placed on the stage 301 and the head309, respectively.

[0169] Specifically, the CCD camera 305 takes a picture of an electrode304 on the semiconductor chip 303 on the stage 301. The positionadjusting mechanism 323 calculates position data of the first electrode304 on the basis of an image, and calculates position data of the secondelectrode 308 on the basis of an image of the second electrode 308obtained by the CCD camera 308. Thereafter, the position adjustingmechanism 323 moves at least either the stage 301 or the head 309 on thex-y plane on the basis of the position data, adjusts an inclination θaround the axis z, and aligns the first and second electrodes 304 and308.

[0170] The CCD cameras 305 and 306 are coupled to a camera movingmechanism 324. Once the first and second electrodes 304 and 308 arealigned, the camera moving mechanism 324 withdraws the CCD cameras 305and 306 from the stage 301 and the head 309.

[0171] The semiconductor manufacturing system 300 further includes asolvent injector 330 and an injection-movement controlling mechanism 331connected to the solvent injector 330. The solvent injector 330 issubstantially in the shape of a syringe, and injects the solvent ontothe first electrode 304 or the second electrode 308. Theinjection-movement controlling mechanism 331 lets the solvent injector330 scans the semiconductor chip 303 between the stage 301 and head 309,i.e. on the semiconductor chip 303, and controls an amount of thesolvent to be injected by the solvent injector 330. In this state, thesolvent injector 330 is not in contact with the first electrode 304.

[0172] Prior to joining the first and second electrodes 304 and 308, thesolvent has to be activated at a melting point temperature which isbelow a temperature where the first or second electrode 304 or 308melts. Further, the solvent should be heat-cured after the first andsecond electrodes 304 and 308 are joined.

[0173] The position adjusting mechanism 323 can move at least either thestage 301 or the head 309 along the axis z. After the movement of thestage 301 or the head 309 and injection of the solvent to the firstelectrode 304, the first and second electrodes 304 and 308 arecompressed via the solvent.

[0174] The stage 301 has a heater 302 therein while the head 309 has aheater 310 therein. These heaters 302 and 310 heat the solvent in orderto promote activation of the solvent.

[0175] The jointing area of the stage 301 and the head 309 may beexposed to the air, but is preferably maintained in an inert gas such asan N₂ or Ar gas.

[0176] Further, an ultrasonic generator may be connected at least to thestage 301 or the head 309 in order to improve the joint between thefirst and second electrodes 304 and 309.

[0177] [Method of Manufacturing Semiconductor Device]

[0178] The semiconductor device of this embodiment will be manufacturedby the semiconductor manufacturing system 300 according to a procedureshown in FIG. 11.

[0179] Referring to FIG. 10 and FIG. 12, circuit mounting surfaces ofthe semiconductor chip 303 (high speed DRAM chip) and the semiconductorchip 307 (log chip) face with each other and are stuck in thesemiconductor device. In other words, the semiconductor substrates arejoined each other, i.e. between the first electrode 304 of thesemiconductor chip 303 and the second electrode 308 of the semiconductorchip 307. Signals such as clock signals, control signals and datasignals can be transmitted at an accelerated speed between thesemiconductor chips 303 and 307, so that the semiconductor device canoperate circuits, and read and write data at accelerated speeds.

[0180] (1) The first and second electrodes 304 and 308 of thesemiconductor chips 303 and 307 are joined at the atmospheric roompressure and in an inert gas such as N₂ or Ar, using the semiconductormanufacturing system 300 (S400). Alternatively, the electrodes 304 and308 may be joined in the air.

[0181] Prior to the joining process, at least the first or secondelectrode 304 or 308 is suitably shaped so as to promote joining. Forinstance, with the semiconductor chip 307, the second electrode 308 in awafer state is in the shape of a bump. The second electrode 308 ismainly made of Cu, is a square of 5 μm, and has an arranging pitch of 10μm. Further, approximately hundred thousand second electrodes 308 arearranged per chip.

[0182] The semiconductor chip 303 includes the first electrode 304 whichis as large as the second electrode 308 of the semiconductor chip 307,and has an arranging pitch equal to that of the second electrode 308.The first electrode 304 is mainly made of Cu similarly to the secondelectrode 308.

[0183] The first and second electrodes 304 and 307 may be Cu bumpelectrodes.

[0184] In the semiconductor manufacturing system 300, the stage 301 andthe head 309 are spaced. A conveyer robot 321 delivers the semiconductorchip 303 to the stage 301, and a conveyer robot 322 delivers thesemiconductor chip 307 to the head 309 (S401). The stage 301 and thehead 309 are reliably kept parallel to the x-y plane (the horizontalplane), and not inclined to the x-y plane.

[0185] The CCD camera 305 takes a picture of the first electrode 304 onthe stage 301, and outputs position data of the first electrode 304 tothe position adjusting mechanism 323. Further, the CCD camera 306 takesa picture of the second electrode 308 on the head 309, and outputsposition data of the second electrode 308 to the position adjustingmechanism 323. The position adjusting mechanism 323 moves the stage 301or the head 309 on the x-y plane, adjusts the inclination θ, and alignsthe first and second electrodes 304 and 308 (S402). Alignment of theelectrodes 304 and 308 may be performed by an optical positioning unitusing laser beams in place of the CCD cameras.

[0186] The injection-movement controlling mechanism 331 lets theinjector 330 scan the semiconductor chip 303. The injector 330 injectsthe solvent all over the first electrode 304 and sticks it onto thefirst electrode 304 (S403). In this embodiment, the solvent is stuckonly onto the first electrode 304. Alternatively, the solvent may bestuck onto the second electrode 308, or onto both of the first andsecond electrodes 304 and 308.

[0187] In the foregoing process, the non-activated solvent is stuck ontothe first electrode 304. When activated, the solvent melts or reduces atleast one of oxide, sulfide, or organic substances stuck onto a metalsurface. For instance, the solvent may be isopropyl alcohol, hexyleneglycol, polyhedral alcohol or the like which contains an activator suchas an organic acid, acetic acid or amino ethanol. Alternatively,non-organic acid such as phosphoric acid, hydrochloride, sulfide orfluoric acid may be included. The solvent may be water soluble or notwater soluble. In this embodiment, the solvent is injected and dispensedby the injector 330. So long as the solvent is a fluid, it may beapplied using a brush or the like.

[0188] The position adjusting mechanism 323 moves at least the stage 301or the head 309 toward the axis z, thereby bringing the first and secondelectrodes 304 and 308 into contact with each other via the solvent(S404).

[0189] Thereafter, the stage 301 or the head 309 is further moved towardthe axis z in order to compress the first and second electrodes 304 and308 (S405). The heater 302 of the stage 301 and the heater 310 of thehead 309 heat the first and second electrodes 304 and 308, respectively.This means that resistance heating is performed. Specifically, heatingis performed at a temperature which is lower the melting pointtemperature of the first or second electrode 304 or 308, which is lower,and until the solvent is activated via the first and second electrodes304 and 308. For instance, the heating temperature is raised by 10° C.per second until the solvent reaches the activation temperature of 160°C. from the room temperature. The activation temperature is maintainedfor one minute.

[0190] Ultrasonic vibrations may be applied to the first and secondelectrodes 304 and 308 while the solvent is being activated. Ultrasonicvibrations are effective in promoting removal of oxide films or the likefrom the first and second electrodes 304 and 308, and exposing a freshmetal surface on the electrodes 304 and 308.

[0191] Once joined (S400), the first and second electrodes 304 and 308are electrically and mechanically connected.

[0192] (2) The semiconductor chips 303 and 307 are carried to anannealing unit and are annealed at 250° C. for one hour (S410). Theannealing can obviate voids existing at the joined areas of the firstand second electrodes 304 and 308, enlarge the joined areas of theelectrodes 304 and 308, and increase joining strength. This is effectivein improving productivity of the semiconductor device.

[0193] (3) The annealed semiconductor chips 303 and 307 are immersed ina cleaning bath filled with a cleaning fluid, and are subject toultrasonic cleaning, thereby removing the solvent from the electrodesand semiconductor chips (S411).

[0194] (4) After the cleaning, an under-fill resin is filled into gapsbetween the semiconductor chips 303 and 307 (S412), and protects thefirst and second electrodes 304 and 308 against exposure to the air, andprevents intrusion of water from outside. This is effective inpreventing electrical and mechanical aging in response to the lapse oftime. Further, the under-fill resin can improve the mechanical strengthof the joined areas of the first and second electrodes 304 and 308.

[0195] (5) The semiconductor chips 303 and 307 are packaged (S413), sothat the semiconductor device of the fourth embodiment will becompleted.

[0196] In this embodiment, the solvent may be either water soluble ornon-water soluble. Needless to say, the cleaning process (S411) may bechanged depending upon the quality of the solvent. For example, if thesolvent is oil soluble, an organic cleaning fluid may be used.

[0197] [Structure of Semiconductor Device]

[0198]FIG. 12 shows an example of semiconductor devices manufactured bythe method in the fourth embodiment. The semiconductor device includes:a semiconductor chip 303 having a first electrode 304; a semiconductorchip 307 having a second electrode 308; an under-fill resin 353 betweenthe semiconductor chips 303 and 307; a wiring substrate 350 constitutinga package; and a wire 352 electrically and mechanically connecting anexternal electrode 351 of the semiconductor chip 303 to an electrode ofthe wiring substrate 350.

[0199] In this embodiment, the non-activated solvent is stuck onto atleast the first electrode 304 or the second electrode 308, and is thenactivated by heating. The first and second electrodes 304 and 308 arecompressed with the activated solvent maintained therebetween. Thesolvent is activated at the temperature which is lower than the meltingpoint temperatures of the first and second electrodes 304 and 308, andkeeps the metal of these electrodes 304 and 308 remain solid. Neither adangerous gas nor a vacuum unit is necessary, which can simplify asemiconductor manufacturing line, and suppress generation of poor jointsbetween the electrodes 304 and 308. This is because no metal melting isrequired.

[0200] [Modified Examples]

[0201] The semiconductor device of the fourth embodiment comprises thesemiconductor chip 303 as the high speed DRAM, and the semiconductorchip 307 as the logic chip, both of which are stacked. Alternatively,the semiconductor device may comprise stacked memory chips such as aDRAM and a SRAM (static random access memories), or stacked logic chips.

[0202] Further, the present invention is applicable to a semiconductordevice comprising three stacked semiconductor chips, i.e. athree-dimensional semiconductor device. In such a case, through plugswill be used as connection electrodes.

[0203] The present invention is applicable to joining of electrodes inthe wafer before the dicing process.

[0204] With respect to the semiconductor manufacturing system 300, theparallelism between the stage 301 and the head 309, positioningprecision of the first and second electrodes 304 and 308 in the x and ydirections and the inclination θ, dimensions of the electrodes,arranging pitches, the number of electrodes and so on can be determinedin accordance with the precision to be satisfied by the semiconductordevice to be manufactured.

[0205] In the fourth embodiment, the solvent is stuck onto the electrode304 (S403) and the electrodes 304 and 308 are brought into contact(S404), and the solvent is heated by the heaters 302 and 310 (S405).Alternatively, the solvent may be heated after it is stuck onto theelectrode 304, and be activated by heating. Then, the electrodes 304 and308 may be compressed to be joined. Through experiments, the inventorhas noted that it is possible to shorten the compressing process bystacking the solvent onto the electrode, activating the solvent byheating and joining the electrodes. In other words, if it is notnecessary to shorten the compressing process, the electrodes can bereliably joined with sufficient mechanical strength.

[0206] Further, the solvent may be activated by irradiating infraredrays, electron beams, laser beams or the like in place of the resistanceheating.

FIFTH EMBODIMENT OF THE INVENTION

[0207] A fifth embodiment relates a modification of the semiconductordevice and the manufacturing method of the fourth embodiment. A solventwhich serves as an under-fill resin after being heat-cured is employedin place of the solvent which is cleaned after the electrodes are joined(S405). Therefore, it is possible to obviate the solvent cleaningprocess and the under-fill resin supplying process.

[0208] The solvent which can also serve as the under-fill resin can meltor reduce metal oxide or the like at a temperature which is low but ishigher than the room temperature, i.e. approximately 150° C., and isheat-cured at approximately at 250° C. The heat-cured solvent can be infirm contact with the objects to be joined, and preferably prevent wateror the like from intruding into the joined portion in a condition wherethe semiconductor device is used.

[0209] [Structure of Semiconductor Device]

[0210] Referring to FIG. 13, the semiconductor device comprises: awiring substrate 503 which is the first substrate; a first electrode 504on the wiring substrate 503; a semiconductor chip 501 stacked on thefirst wiring substrate 503 and functioning as a second substrate; asecond electrode 502 on the semiconductor chip 501 and joined to thefirst electrode 504; an under-fill resin 505 applied between the wiringsubstrate 503 and the semiconductor chip 501.

[0211] The wiring substrate 503 may be a printed circuit board includinga glass epoxy resin as a core, a ceramics substrate, a silicon carbidesubstrate, a glass substrate or a silicon substrate. In addition tofirst electrode and wiring, the wiring substrate 503 may be mounted onthe circuit. Further, the wiring substrate 503 may have a single wiringlayer on its front surface, or multiple wiring layers on its rearsurface and interior.

[0212] The semiconductor chip 501 may be a high speed DRAM chip or alogic chip similarly to the semiconductor device in the fourthembodiment.

[0213] [Method of Manufacturing Semiconductor Device]

[0214] A semiconductor device of this embodiment will be manufactured bythe semiconductor manufacturing system 300 (shown in FIG. 10) accordingto a procedure shown in FIG. 14.

[0215] In the semiconductor device, a chip mounting surface of thewiring substrate 503 and a circuit mounting surface of the semiconductorchip 501 face with and are stuck each other as shown in FIG. 13.Specifically, a first electrode 504 of the wiring substrate 503 and asecond electrode 502 of the semiconductor chip 501 are directly joined.

[0216] (1) First of all, the first and second electrodes 504 and 502 arejoined by the semiconductor manufacturing system 300 at the atmosphericpressure and in an inert gas such as N₂ or Ar (S450). Alternatively, theelectrodes 504 and 502 may be joined in the air.

[0217] Prior to the joining process, at least either the first or secondelectrode 504 or 502 is shaped to be suitable to be joined. Forinstance, in the semiconductor chip 501 in the state of a wafer, thesecond electrode 502 is in the shape of a quadratic prism or a cylinder,and is mainly made of Ni. The second electrode 502 has a sectional areaof 60 μm square or a circle of 60 μm diameter, and an arranging pitch of100 μm. In the semiconductor chip 501, approximately hundred thousandsecond electrodes 502 are arranged per chip. In the wiring substrate503, the first electrodes 504 are arranged at a pitch equal to that ofthe second electrode 502. The first electrode 504 is slightly largerthan the second electrode 502 and has a square sectional area of 70 μmor a circular sectional areas of 70 μm. The first and second electrodes504 and 502 are mainly made of Cu covered by Ni, and are not required tobe in the shape of a bump, although the first and second electrodes 304and 308 are bump electrodes in the fourth embodiment. This is becausethe first electrode 504 is slightly larger than the second electrode502, i.e. they can be aligned with some margins kept around them whenthey are joined.

[0218] The stage 301 and the head 309 are spaced in the semiconductormanufacturing system 300. The robot 321 delivers the wiring substrate503 to the stage 301 while the robot 322 delivers the semiconductor chip501 to the head 309 (S451). The stage 301 and the head 309 are preciselymaintained parallel to the x-y plane, without any inclination.

[0219] The CCD camera 305 takes picture of the first electrode 504 onthe stage 301, and outputs position data of the first electrode 504 tothe position adjusting mechanism 323. The CCD camera 306 takes pictureof the second electrode 502 on the head 309, and outputs position dataof the second electrode 502 to the position adjusting mechanism 323. Onthe basis of the received position data, the position adjustingmechanism 323 moves either the stage 301 or the head 309 on the x-yplane, adjusts the inclination θ, and aligns the first and secondelectrodes 504 and 502 (S452). Alternatively, alignment may be carriedout by optical alignment using laser beams in place of the CCD cameras,as in the fourth embodiment.

[0220] The injection-movement controlling mechanism 331 lets the solventinjector 330 scan the wiring substrate 503. The solvent injector 330injects the solvent onto the first electrode 504 in order to cover it(S453). In the fifth embodiment, the solvent is stuck onto only thefirst electrode 504. Alternatively, the solvent may be stuck onto onlythe second electrode 502, or both of the first and second electrodes 504and 502. In this case, the solvent is in the non-activated state. Whenactivated, the solvent melts or reduces oxide substances on a metalsurface of the first electrode 504, similarly the solvent used in thefourth embodiment. Further, the solvent is heat-cured at a temperaturehigh than the activation temperature, and is on the market under thename of “NO-FLOW UNDER-FILL RESIN”.

[0221] Thereafter, the position adjusting mechanism 323 moves at leastthe stage 301 or the head 309 toward the axis z, thereby bringing thefirst and second electrodes 504 and 502 into contact with each other viathe solvent (S454).

[0222] Further, the position adjusting mechanism 323 moves the stage 301or the head 309 toward the axis z, compressing the first and secondelectrodes 504 and 502 (S455). In this state, the heater 302 in thestage 301 and the heater 310 in the head 309 heat the first and secondelectrodes 504 and 502, respectively. Resistance heating is performed inthis case. Heating is performed to a temperature which is lower than themelting point of the first or second electrode 504 or 502 and until thesolvent is activated. As described above, ultrasonic vibrations may beapplied between the first and second electrodes 504 and 502 during theactivation of the solvent. Application of ultrasonic vibrations promotesremoval of oxide films from the surfaces of the first and secondelectrodes 504 and 502, and exposure of fresh surfaces of the first andsecond electrodes 504 and 502.

[0223] The first and second electrodes 504 and 502 are electrically andmechanically joined (S450).

[0224] (2) The wiring substrate 503 and the semiconductor chip 501 arecarried to an annealing unit and are annealed at 250° C. for one hour(S460). The annealing process can obviate voids existing at the joinedareas of the first and second electrodes 504 and 502, and join theelectrodes 504 and 502 at increased areas and with an increasedstrength. This is effective in improving productivity of thesemiconductor device. Further, when heat-cured, the solvent can form anunder-fill resin 505. Therefore, the first and second electrodes 504 and502 can be blocked from the air, and be reliably, electrically andmechanically joined with increased strength. Further, since neithercleaning nor refilling the under-fill resin is required, productivity ofthe semiconductor device can be improved further.

[0225] The annealing process may be carried out at 250° C. for 30minutes if the solvent is simply heat-cured.

[0226] The method of the fifth embodiment is as advantageous as themethod of the fourth embodiment. Further, the first electrode 504 andthe second electrode 502 are joined via the solvent. Then, the solventis heat cured. Since no cleaning or refilling of the under-fill resin isnecessary, it is possible to reduce the number of manufacturingprocesses.

[0227] [Modified Examples]

[0228] In the fifth embodiment, the solvent is stuck onto the firstelectrode (S454), the first and second electrodes are joined (S454), andthe solvent is heated by the heaters 302 and 301 (S455). Alternatively,the solvent may be heated after it is stuck onto the first electrode,and the first and second electrodes may be joined via the activatedsolvent.

[0229] Further, the solvent may be activated by irradiating infraredrays, electron beams, laser beams or the like in place of the resistanceheating.

[0230] Still further, a solvent which is in the shape of a film at aroom temperature may be used. In such a case, the solvent can be easilystuck onto the semiconductor chip 501 kept by the head 309.

OTHER EMBODIMENTS OF THE INVENTION

[0231] The bump electrode 21 is the Cu bump electrode in thesemiconductor device 2 of the first embodiment. Alternatively, the bumpelectrode 21 may be an Au or Ni bump electrode.

[0232] In the third embodiment, the semiconductor device 2 includes theSn bump electrode. A two-component bump electrode such as an Sn—Pb,Sn—Ag, Sn—Zn or Sn—Cu bump electrode, a three-component bump electrodesuch as an Sn—Ag—Cu bump electrode, or four-component or more-componentelectrodes may be used to constitute the semiconductor device 2.

[0233] With the semiconductor device 2 of the first embodiment, theexternal connection electrode 18 (external connection terminal orexternal connection electrode) of the semiconductor chip 1 is providedwith the UBM film 20 and the bump electrode 21. The external connectionelectrode 37 of the interposer 3 is provided with the UBM film 40 andthe bump electrode 41. Alternatively, the electrode 52 (internalterminal or internal electrode) and the external connection terminal(not shown) of the multiple wiring substrate 5 may be provided with theUBM films and bump electrodes.

[0234] In the foregoing semiconductor device 2, only one semiconductorchip 1 is mounted on the multiple wiring substrate 5. Alternatively, aplurality of semiconductor chips 1 may be two-dimensionally mounted onthe multiple wiring substrate 5.

[0235] Finally, the semiconductor devices and the manufacturing methodsof the first to third embodiments and the semiconductor devices and themanufacturing methods of the fourth and fifth embodiments may be used incombination.

[0236] The embodiments of the present invention provides thesemiconductor devices and the manufacturing methods which areadvantageous in the following respects.

[0237] (1) The semiconductor devices can assure high integration,accelerated circuit operation and provision of a great number ofterminals.

[0238] (2) The semiconductor devices can improve electrical andmechanical reliability of connections between electrodes and bumpelectrodes.

[0239] (3) The semiconductor device manufacturing methods can produceminute bump electrodes.

[0240] (4) The semiconductor device manufacturing methods can improvemanufacturing throughput.

[0241] (5) The semiconductor device manufacturing methods can reduce thenumber of manufacturing processes.

[0242] (6) The solvent is present between the electrodes and removesmetal oxide or the like from the electrodes when activated. Theelectrodes are compressed via the solvent. Neither a dangerous gas nor avacuum unit is necessary in the joining process, so that a semiconductormanufacturing line can be simplified. Further, the electrodes can bejoined without melting metal, which is effective in preventing poorjoining between the electrodes.

[0243] Although the invention has been described with respect to someembodiments thereof, it will be understood that those skilled in the artthat various modifications are possible without departing from thespirit of the present invention.

What is claimed is:
 1. A semiconductor device comprising; a firstelectrode formed above a first substrate; an under bump metal film onsaid first electrode, said under bump metal film being in the shape of arecess; and a bump electrode embedded in said under bump metal film,said bump electrode having sides and bottom thereof surrounded by saidunder bump metal film.
 2. The semiconductor device of claim 1, whereinsaid bump electrode has a top surface whose height is substantiallyequal to height of side walls of said under bump metal film.
 3. Thesemiconductor device of claim 1, wherein at least a part of the sidewalls of said under bump metal film and being near said first electrodeis surrounded by an insulating film.
 4. The semiconductor device ofclaim 1, wherein said bump electrode includes a chamfered upperperipheral edge.
 5. The semiconductor device of claim 1 furthercomprising a second substrate including a second electrode connected tosaid bump electrode.
 6. The semiconductor device of claim 5, whereinsaid second electrode is a plug, and said second substrate is aninterposer.
 7. A method of manufacturing a semiconductor device,comprising: forming an electrode; forming an insulating film on saidelectrode, said insulating film having an aperture; forming an underbump metal film on said insulating film, an inner wall of said apertureand said electrode in said aperture; forming a bump electrode film onsaid under bump metal film, and embedding said bump electrode film insaid aperture; removing said bump electrode film and said under bumpmetal film from portions except for said aperture to from a bumpelectrode; and taking off at least a part of a surface of saidinsulating film.
 8. The method of manufacturing a semiconductor deviceof claim 7, wherein: when forming said insulating film, a firstinsulating film is formed, and a second insulating film is formed onsaid first insulating film, said second insulating film having anetching ratio different from an etching ratio of said first insulatingfilm; and when taking off at least a part of a surface at saidinsulating film, said second insulating film is selectively etched. 9.The method of manufacturing a semiconductor device of claim 7, wherein:when removing said bump electrode film and said under bump metal film,said under bump metal film and said bump electrode film on saidinsulating film and said aperture are removed by chemical mechanicalpolishing to form said bump electrode surrounded by said under bumpmetal film on said inner walls of said aperture and on said electrode insaid aperture.
 10. The method of manufacturing a semiconductor device ofclaim 7, wherein after taking off at least a part of the surface of saidinsulating film, said bump electrode is flattened at a top surfacethereof.
 11. The method of manufacturing a semiconductor device of claim7, wherein after taking off at least the surface of said insulatingfilm, said bump electrode is chamfered at a peripheral edge thereof. 12.The method of manufacturing a semiconductor device of claim 7, whereinsaid bump electrode is a solder bump electrode, and said solder bumpelectrode is subject to reflowing.
 13. A method of manufacturing asemiconductor device, comprising: forming a first substrate having afirst electrode; forming a second substrate having a second electrode;applying a non-activated solvent onto a surface of at least one of saidfirst and second electrodes; bringing said second electrode into contactwith said first electrode via said non-activated solvent, andcompressing said first and second electrodes; and activating saidsolvent at a temperature which is lower than a melting pointtemperatures of said first and second electrodes, before said first andsecond electrodes are joined.
 14. The method of manufacturing asemiconductor device of claim 13, wherein at least one of said first andsecond electrodes is a bump electrode.
 15. The method of manufacturing asemiconductor device of claim 13, wherein at least one of said first andsecond electrodes contains at least one of Cu, Ni, Au and Ag.
 16. Themethod of manufacturing a semiconductor device of claim 13, wherein saidsolvent contains inorganic or organic acid.
 17. The method ofmanufacturing a semiconductor device of claim 13, wherein said solventis activated by resistance heating, or by irradiating infrared rays,electron beams or laser beams.
 18. A method of manufacturing asemiconductor device, comprising: forming a first substrate having afirst electrode; forming a second substrate having a second electrode;applying a non-activated solvent onto a surface of at least one of saidfirst and second electrodes, said non-activated solvent being thermallyset and being activated at a temperature which is lower than athermosetting temperature; bringing said second electrode into contactwith said first electrode via said non-activated solvent, andcompressing said first and second electrodes; activating said solvent ata temperature which is lower than a melting point temperatures of saidfirst and second electrodes, before said first and second electrodes arejoined; and heat-curing said solvent after said first and secondelectrodes are joined.
 19. The method of manufacturing a semiconductordevice of claim 18, wherein at least one of said first and secondelectrodes is a bump electrode.
 20. The method of manufacturing asemiconductor device of claim 18, wherein at least one of said first andsecond electrodes contains at least one of Cu, Ni, Au and Ag.
 21. Themethod of manufacturing a semiconductor device of claim 18, wherein saidsolvent contains inorganic or organic acid.
 22. The method ofmanufacturing a semiconductor device of claim 18, wherein said solventis activated by resistance heating, or by irradiating infrared rays,electron beams or laser beams.